TECH&SOLUTION
I.S.P (Image signal process)
홈
TECH&SOLUTION
I.S.P (Image signal process)
1 Ambarella A7LS – Sports processor (Package:14mm X 14mm)
① Clock frequency up to 700 MHz
② Memory management Unit(MMU) 16-KB data cache,16-KB instruction cache
③ DDR3/L/U controller
④ AHB Bus DMA controller
⑤ Dedicated DMA co-processor for graphics and image operations
⑥ Sensor/Video Input(VIN) interface
⑦ Video Output(VOUT)interfaces
⑧ Still Capture
⑨ Image / Video Processing
⑩ Thumbnail Browsing
⑪ Video/Still Playback
⑫ Postprocessing
⑬ I2S digital audio interface (stereo)
⑭ USB2.0 device interface
⑮ Flexible Storage Media Input /Output(SMIO)interface
2 SonyISP IT-N2(CXD4191AGG) Spec
① Supports 3.1M CMOS image sensor(IMX036/IMX103),Supports 2.3M CMOS image sensor(IMX122/IMX136)
② YPbPr digital output pin(16/20 bit), ITU-R BT1120,SMPTE296M Supports standard HD format
③ YCrCb digital output pin(16/20bit) ,ITU-R BT656 Supports standard video format
④ High picture quality signal processing
⑤ Built-in detector for high accuracy camera control
⑥ Block control functions with and internal CPU
⑦ Wide dynamic range signal processing function
⑧ Noise reduction
⑨ Flicker detection and correction
⑩ Shading correction
⑪ Static blemish detection and compensation function(1024 points)/ Dynamic blemish detection and compensation function
⑫ OSD function
⑬ Peripheral IC control
⑭ Serial communication function(I2C/SPI)
3 Eyenix ISP EN778 Spec(114 ball FBGA 10mm x 10mm)
① Advanced RGB Interpolator for High Resolution,Double shutter Wide Dynamic Range compensation(WDR)
② Adaptive Digital Noise Reducer(2D/3D)
③ Adaptive Contrast Enhancer(ACE)
④ Lens Shading Compensation
⑤ Digital Zoom(Only 1.3M ~ 2M Sensor)
⑥ Defect Detection & Correction (Manual:1024ea)
⑦ Optical detector(AE,AF,AWB)
⑧ Edge enhancement,Gamma Correction ,Hue Controller(8-Way), High Light Masking
⑨ Pseudo Color surpression,High Light Masking,Flip/Mirror/Still
⑩ Motion Object Detector
⑪ Image Output Mode -10/20bit width Digital Interface BT.1120 , SMPTE274M(720p,1080p(Max60p))
Support built-in HD-SDI TX(270M/1.485G/2.97G) – NTSC,PAL CVBS(720H,960H mode)
⑫ Logic PWM Output, De-fog ,Embedded EX-SDI Encoder,I2S encoder / decoder for external ADC/DAC
⑬ Integrated Cable Driver, 1 Channel DAC(CVBS),4 Channel ADC
⑭ 1.3M ~ 2M CMOS sensor (Sony,Panasonic,OV,Aptina,Renesas,ETC.)
⑮ Parallel /Sub-LVDS / HiSPi Interface, Frame Rate -1.3M: Max.60p, -2.0M : Max. 60p
⑯ Operation Frequency 74.25MHz-MCU, 138.5MHz – ISP, 1.2V Core Power,1.8~3.3V I/O
4 Eyenix ISP EN673 Spec(Package -144 ball FBGA 10mm x 10mm)
① ExRISC 32bit processor(Max.200MHz),CPU(2EA-each 32KB(I/D Cache),Embedded SRAM –CPU0/1:32KB, -Shared 32KB x 2
② 1M~2M Bayer sensor input Sub-LVDS,HiSPI,parallel 12bits,Frame rate(1M:Max,120fps,2M:Max.60fps),External video input ,BT.656*8/10bits),BT.1120(20 bits)
③ ISP functions(WDR,AE,AWB,3DADNR,Motion detection & alarm,adaptive contrast enhancer etc..
④ Video Encoder(H.264 Encoder (BP/MP @Level 4.1) , MJPEG/JPEG BP
⑤ Realtime hard wired H.264 encoding (2M 40fps), -1080P+VGA(30fps),H.264 + MJPEG dual-streaming(2M 30fps),H.264+MJPG dual-streaming(2M 30fps), CBR/VBR control
⑥ Audio encoding /Decoding ,hard-wired G.711 Audio Codec,I2S interface for external audio Codec
⑦ Peripheral Interfaces UART 3ch, I2C 3ch, SPI 3ch, GPIO 24ch,Timer 6ch,PWM 6ch(GPIO mux) SDIO3.0 2ch for Wifi and SD Card, SPI Nor Flash : up to 256MB,On-chip ADC(3ch mux type)
⑧ Operation Voltage -1.8V or 3.3V I/O,-1.2V Core Power , Power consumption (about 650mW)
5 GENESYSLOGIC ,GL864A Spec
① Compliant with USB 2.0 high-speed and full-speed, Output data format can be either YUV or MJPEG
② Embedded 8051 micro-controller,operate @ 15Mhz or 30MHz clock , Built-in 3.3V to 1.2V regulator for chip core power,Built-in OCCS(on-chip clock source)to eliminate the need for a 12MHz crystal clock source on board
③ The sensor, UVC, property control settings cab be stored in either external EEPROM or SPI Flash
④ Compliant with UVC(USB Video Class)mode, OS in – box driver okay
⑤ Support YUV2 and RAW(Bayer Pattern)data format from sensor
⑥ Support UVC uncompressed YUY2 payload, Support UVC compressed MJPEG payload
⑦ Support up to 96MHz pixel clock,Support up to I2C for sensor control,Still image capture up to 9192x 4096 resolution
⑧ Support MJPEG up to resolution SXGA(1280x1024),Support UVC MJPEG payload
⑨ Image Signal Processing (ISP)Engine
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